1. Field of the Invention
The present invention generally relates to method of forming a semiconductor device.
Priority is claimed on Japanese Patent Application No. 2011-167383, filed Jul. 29, 2011, the content of which is incorporated herein by reference.
2. Description of the Related Art
In recent years, large scale integrated circuits have been used in computers and electronic devices. The large scale integrated circuits include a large number of MOS transistors integrated on a single semiconductor chip. Upon shrinkage of semiconductor devices such as DRAMs (dynamic random access memories), shrinkage of transistors are also required in which gate electrodes are buried in grooves in a semiconductor substrate.
Japanese Unexamined Patent Application, First Publication, No. 2011-54629 discloses that tungsten (W) and titanium nitride (TiN) are buried in grooves of a semiconductor substrate, and then the tungsten (W) and titanium nitride (TiN) are etched back to form buried gate electrodes in the grooves, where the buried gate electrode includes the tungsten (W) and titanium nitride (TiN) films.
Japanese Unexamined Patent Application, First Publication, No. 2009-164612 discloses that a first conductive layer is buried in grooves of a semiconductor substrate, and then the first conductive layer is etched back to form buried gate electrodes of the first conductive layer in the grooves.
Japanese Unexamined Patent Application, First Publication, No. 2008-300843 discloses that a gate electrode of a conductive carbon material is buried in a groove of a semiconductor substrate.
Japanese Unexamined Patent Application, First Publication, No. 2008-4738 discloses that a first gate electrode is buried in a groove of a semiconductor substrate and a second gate electrode is disposed through groove side walls.